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data sheet march 1997 l7554 low-power slic features n low active power (typical 165 mw during on-hook transmission) n sleep state for low idle power (76 mw) n quiet tip/ring polarity reversal n supports meter pulse injection n spare op amp for meter pulse ?tering n ?4 v to ?2 v power supply operation n distortion-free on-hook transmission n convenient operating states: ?forward powerup ?polarity reversal powerup ?forward low-power scan ?polarity reversal low-power scan ?ground start ?disconnect (high impedance) n adjustable supervision functions: ?off-hook detector with longitudinal rejection ?ground key detector ?ring trip detector n independent, adjustable, dc and ac parameters: ?dc feed resistance ?loop current limit ?termination impedance n thermal protection description this electronic subscriber loop interface circuit (slic) is optimized for low-power consumption while providing an extensive set of features. quiet polarity reversal is possible because the ac path is uninterrupted during transition. the l7554 includes the ground start state and a summing node for meter pulse injection to 2.2 vrms. a spare, uncommitted op amp is included for meter pulse ?tering. the device is being offered in two versions, based upon maximum battery. the l7554ap is guaranteed to ?0 v, and the l7554bp is guaranteed to ?2 v. the device is available in a 44-pin plcc package. it is built by using a 90 v complementary bipolar (cbic) process.
2 lucent technologies inc. data sheet march 1997 l7554 low-power slic table of contents content page features .................................................................................................................................................................. 1 description ............................................................................................................................................................... 1 pin information ......................................................................................................................................................... 4 functional description .............................................................................................................................................. 6 absolute maximum ratings ..................................................................................................................................... 6 recommended operating conditions ..................................................................................................................... 7 electrical characteristics ......................................................................................................................................... 7 ring trip requirements ..................................................................................................................................... 11 test configurations ............................................................................................................................................... 12 applications ........................................................................................................................................................... 14 design considerations ....................................................................................................................................... 16 characteristic curves......................................................................................................................................... 17 dc applications ................................................................................................................................................... 20 battery feed.................................................................................................................................................... 20 overhead voltage .......................................................................................................................................... 20 adjusting overhead voltage ........................................................................................................................... 21 adjusting dc feed resistance......................................................................................................................... 22 adjusting overhead voltage and dc feed resistance simultaneously .......................................................... 22 loop range..................................................................................................................................................... 22 off-hook detection ......................................................................................................................................... 22 ring trip detection......................................................................................................................................... 23 ring ground detection................................................................................................................................... 23 ac design ........................................................................................................................................................... 24 first-generation codecs.................................................................................................................................. 24 second-generation codecs ............................................................................................................................ 24 third-generation codecs ................................................................................................................................ 24 selection criteria ............................................................................................................................................. 24 pcb layout information ......................................................................................................................................... 26 outline diagram...................................................................................................................................................... 27 44-pin plcc ....................................................................................................................................................... 27 ordering information ........................................................................................................................................... 28
lucent technologies inc. 3 data sheet march 1997 l7554 low-power slic description (continued) 12-2569 (c) figure 1. functional diagram b0 b1 + + ? v/24 ma + + + a = 4 a = ? power conditioning & reference pt pr dc resistance adjust dcr v bat i prog cf1 bgnd agnd cf2 icm rtsn rtsp lcth ring ground detector ring trip detector loop closure detector battery feed state control spare op amp dcout vitr rcvp rcvn xmt sn nlc rgdet nrdet 1 b2 fb1 fb2 9.6 v tx t xi 0.1 ? c external 3 rectifier v reg v cc
4 lucent technologies inc. data sheet march 1997 l7554 low-power slic pin information 12-2571 (c) figure 2. pin diagram (plcc chip) table 1. pin descriptions pin symbol type description 3 i prog i current-limit program input. a resistor to dcout sets the dc current limit of the device. 8 v cc +5 v power supply. 9 rcvp i receive ac signal input (noninverting). this high-impedance input controls the ac differential voltage on tip and ring. 10 rcvn i receive ac signal input (inverting). this high-impedance input controls the ac differen- tial voltage on tip and ring. 11 txi ac/dc separation. connect a 0.1 m f capacitor from this pin to vtx . 12 lcth i loop closure threshold input. connect a resistor to dcout to set off-hook threshold. 13 v reg i regulated negative dc battery voltage. can be connected to an external regulator. otherwise, connect to v bat . 14 dcout o dc output voltage. this output is a voltage that is directly proportional to the absolute value of the differential tip/ring current. 15 v bat battery supply. negative high-voltage power supply. 16 pr i/o protected ring. the output of the ring driver ampli?r and input to loop sensing circuitry. connect to loop through overvoltage protection. 18 cf2 filter capacitor 2. connect a 0.1 m f capacitor from this pin to agnd. 19 cf1 filter capacitor 1. connect a 0.47 m f capacitor from this pin to pin cf2. i prog nlc nrdet rtsp rtsn pt rcvn rcvp v cc lcth v reg dcout v bat pr bgnd dcr agnd agnd b0 i cm vitr cf2 cf1 7 9 10 11 12 13 14 15 16 17 8 6 4 3 2 1 4443424140 5 18 20 21 22 23 24 25 26 27 28 19 39 37 36 35 34 33 32 31 30 29 38 fb2 b2 vtx txi b1 xmt sn fb1 l7554 r gdet
lucent technologies inc. 5 data sheet march 1997 l7554 low-power slic pin information (continued) table 1. pin descriptions (continued) pin symbol type description 20 vitr o transmit ac output voltage. this output is a voltage that is directly proportional to the differential ac tip/ring current. 21 i cm i common-mode current sense. to program ring ground sense threshold, connect a resistor to v cc and connect a capacitor to agnd to ?ter 50/60 hz. if unused, the pin can be left unconnected. 22 r gdet o ring ground detect. when high, this open-collector output indicates the presence of a ring ground. to use, connect a 100 k w resistor to v cc . 23 b0 i state control input. b0, b1, and b2 determine the state of the slic. see table 2. 24 agnd analog signal ground . 25 agnd analog signal ground. 26 dcr i dc resistance for low loop currents. leave open for dc feed resistance of 118 w , or short to dcout for 618 w . intermediate values can be set by a simple resistor divider from dcout to ground with the tap at dcr. 27 bgnd battery ground. ground return for the battery supply. 29 vtx o this output is a voltage that is directly proportional to the differential tip/ring current. 30 pt i/o protected tip . the output of the tip driver ampli?r and input to loop sensing. connect to loop through overvoltage protection. 31 rtsn i ring trip sense negative . connect this pin to the ringing generator signal through a high-value resistor. 32 rtsp i ring trip sense positive . connect this pin to the ring relay and the ringer series resistor through a high-value resistor. 33 nrdet o ring trip detector output . when low, this logic output indicates that ringing is tripped. 34 nlc o loop detector output . when low, this logic output indicates an off-hook condition. 35 b2 i state control input . b0, b1, and b2 determine the state of the slic. see table 2. 36 b1 i/o state control input . b0, b1, and b2 determine the state of the slic. see table 2. 37 xmt o transmit ac output voltage . the output of the uncommitted operational ampli?r. 38 sn i summing node . the inverting input of the uncommitted operational ampli?r. a resistor or network to xmt sets the gain. 39 fb1 i forward battery slowdown. a 0.1 m f capacitor from fb1 to agnd and from fb2 to agnd will ramp the polarity reversal transition for added flexibility in applications requiring quiet polarity reversal. if not needed, the pin can be left open. 40 fb2 i forward battery slowdown. a 0.1 m f capacitor from fb2 to agnd and from fb1 to agnd will ramp the polarity reversal transition for added flexibility in applications requiring quiet polarity reversal. if not needed, the pin can be left open.
6 lucent technologies inc. data sheet march 1997 l7554 low-power slic functional description table 2. input state coding table 3. supervision coding absolute maximum ratings (t a = 25 c) stresses in excess of the absolute maximum ratings can cause permanent damage to the device. these are abso- lute stress ratings only. functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. exposure to absolute maximum ratings for extended periods can adversely affect device reliability. note: the ic can be damaged unless all ground connections are applied before, and removed after, all other connections. furthermore, when powering the device, the user must guarantee that no external potential creates a voltage on any pin of the device that exceeds the device ratings. some of the known examples of conditions that cause such potentials during powerup are the following: 1) an inductor connected to tip and ring can force an overvoltage on v bat through the protection devices if the v bat connection chatters, and 2) inductance in the v bat lead could resonate with the v bat ?ter capacitor to cause a destructive overvoltage. b0 b1 b2 state/definition 1 1 1 powerup, forward battery. normal talk and battery feed state. pin pt is positive with respect to pr. on-hook transmission is enabled. 1 1 0 powerup, reverse battery. normal talk and battery feed state. pin pr is positive with respect to pt. on-hook transmission is enabled. 0 1 1 ground start. tip drive amplifier is turned off. the device presents a high-impedance (>100 k w ) to the pt pin and a current-limited battery to the pr pin. output pin rgdet indicates current flow- ing in the ring lead. 0 1 0 low-power scan, reverse battery. except for off-hook supervision, all circuits are shut down to conserve power. pin pr is positive with respect to pt. on-hook transmission is disabled. 0 0 1 low-power scan, forward battery. except for off-hook supervision, all circuits are shut down to conserve power. pin pt is positive with respect to pr. on-hook transmission is disabled. 0 0 0 disconnect. the tip and ring amplifiers are turned off and the slic goes to a high-impedance state (>100 k w ). pin nlc pin nrdet pin rgdet 0 = off-hook 1 = on-hook 0 = ring trip 1 = no ring trip 1 = ring ground 0 = no ring ground parameter symbol value unit 5 v power supply v cc 7.0 v battery (talking) supply v bat ?5 v logic input voltage ?.5 to +7.0 v analog input voltage ?.0 to +7.0 v maximum junction temperature t j 165 c storage temperature range t stg ?0 to +125 c relative humidity range r h 5 to 95 % ground potential difference (bgnd to agnd) 3 v pt or pr fault voltage (dc) v pt , v pr (v bat ?5) to +3 v pt or pr fault voltage (10 x 1000 m s) v pt , v pr (v bat ?15) to +15 v current into ring trip inputs i rtsp , i rtsn 240 m a
lucent technologies inc. 7 data sheet march 1997 l7554 low-power slic recommended operating conditions electrical characteristics minimum and maximum values are testing requirements. typical values are characteristic of the device and are the result of engineering evaluations. typical values are for information purposes only and are not part of the testing requirements. minimum and maximum values apply across the entire temperature range (?0 c to +85 c) and the entire battery range unless otherwise speci?d. typical is de?ed as 25 c, v cc = 5.0 v, v bat = ?8 v, and i lim = 40 ma. positive currents ?w into the device. test circuit is figure 4 unless noted. table 4. power supply 1. this parameter is not tested in production. it is guaranteed by design and device characterization. parameter min typ max unit ambient temperature ?0 85 c v cc supply voltage 4.75 5.0 5.25 v v bat supply voltage: l7554ap l7554bp ?4 ?4 ?0 ?8 ?0 ?2 v v loop closure threshold-detection programming range 10 i lim ma dc loop current-limit programming range 5 40 45 ma on- and off-hook 2-wire signal level 1 2.2 vrms ac termination impedance programming range 150 600 1300 w parameter min typ max unit power supply?owerup, no loop current i cc i bat (v bat = ?8 v) power dissipation (v bat = ?8 v) 4.1 ?.0 165 4.8 ?.5 191 ma ma mw power supply?ow-power scan, forward bat, no loop current i cc i bat (v bat = ?8 v) power dissipation (v bat = ?8 v) 2.7 ?.4 82 3.7 ?.7 100 ma ma mw power supply rejection 500 hz to 3 khz (see figures 5, 6, 15, and 16.) 1 v cc v bat 35 45 db db thermal protection shutdown (t jc ) 175 c thermal resistance, junction to ambient ( q ja ) 47 c/w
8 lucent technologies inc. data sheet march 1997 l7554 low-power slic electrical characteristics (continued) table 5. 2-wire port 1. the longitudinal current is independent of dc loop current. 2. current-limit i lim is programmed by a resistor, r prog , from pin i prog to dcout. i lim is speci?d at the loop resistance where current limiting begins (see figure 25). select r prog (k w ) = 1.67 x i lim (ma). 3. ieee is a registered trademark of the institute of electrical and electronics engineers, inc. 4. longitudinal balance of circuit card will depend on loop series resistance matching (see figures 23 and 24). 5. this parameter is not tested in production. it is guaranteed by design and device characterization. parameter min typ max unit tip or ring drive current = dc + longitudinal + signal currents 65 ma signal current 15 marms longitudinal current capability per wire 1 8.5 15 marms dc loop current limit 2 r loop = 100 w programmability range accuracy (20 ma < i lim < 40 ma) 5 i lim 45 12 ma ma % powerup open loop voltage levels common-mode voltage differential voltage: v bat = ?8 v, temperature = 25 c v bat = ?2 v, temperature = 85 c (l7554bp) |v bat + 7.0| |v bat + 10.0| v bat /2 |v bat + 6.5| |v bat + 6.8| |v bat + 6.0| v v v disconnect state pt resistance (v bat < v pt < 0 v) pr resistance (v bat < v pr < 0 v) 100 100 143 133 k w k w ground start state pt resistance 100 143 k w dc feed resistance (for i loop below regulation level) 90 113 133 w loop resistance range (?.17 dbm overload into 600 w ; not including protection) i loop = 20 ma at v bat = ?8 v i loop = 20 ma at v bat = ?4 v 1900 700 w w longitudinal to metallic balance ieee 3 std. 455 (see figure 7.) 4 50 hz to 1 khz 1 khz to 3 khz 64 60 75 70 db db metallic to longitudinal balance 200 hz to 4 khz 46 db rfi rejection (see figure 8.) 5 0.5 vrms, 50 w source, 30% am mod. 1 khz 500 khz to 100 mhz ?5 ?5 dbv
lucent technologies inc. 9 data sheet march 1997 l7554 low-power slic electrical characteristics (continued) table 6. analog pin characteristics 1. loop closure threshold is programmed by resistor r lcth from pin lcth to pin dcout. 2. ring ground threshold is programmed by resistor r icm2 from pin i cm to v cc . table 7. uncommitted op amp characteristics parameter min typ max unit differential pt/pr current sense (dcout) gain (pt/pr to dcout) offset voltage @ i loop = 0, v bat = ?8 v ?19 ?00 ?25 ?27 200 v/a mv loop closure detector threshold 1 programming accuracy 20 % ring ground detector threshold 2 r icm = 83 k w programming accuracy 3 6 10 25 k w % ring trip comparator input offset voltage 10 mv rcvn, rcvp input bias current ?.2 ? m a parameter min typ max unit input offset voltage input offset current input bias current differential input resistance 5 10 200 1.5 mv na na m w output voltage swing (r l = 10 k w ) output resistance (a vcl = 1) 3.5 2.0 vpk w small signal gbw 700 khz
10 lucent technologies inc. data sheet march 1997 l7554 low-power slic electrical characteristics (continued) table 8. ac feed characteristics 1. set by external components. any complex impedance r 1 + r2 || c between 150 w and 1300 w can be synthesized. 2. this parameter is not tested in production. it is guaranteed by design and device characterization. 3. return loss and transhybrid loss are functions of device gain accuracies and the external hybrid circuit. guaranteed performance assumes 1% tolerance of external components. parameter min typ max unit ac termination impedance 1 150 1300 w longitudinal impedance 2 40 46 w total harmonic distortion?00 hz to 4 khz 2 off-hook on-hook 0.3 1.0 % % transmit gain, f = 1 khz (pt/pr to vitr) transmit accuracy in db, 25 c transmit accuracy in db, full temperature range ?.15 ?.22 ?00 0 0 0.15 0.22 v/a db db receive + gain, f = 1 khz (rcvp to pt/pr) receive ?gain, f = 1 khz (rcvn to pt/pr) receive accuracy in db, 25 c receive accuracy in db, full temperature range ?.18 ?.25 8.00 ?.00 0 0 0.18 0.25 db db gain vs. frequency (transmit and receive) (600 w termination; reference 1 khz 2 ) 200 hz to 300 hz 300 hz to 3.4 khz 3.4 khz to 16 khz 16 khz to 266 khz ?.00 ?.3 ?.5 0.0 0.0 ?.1 0.05 0.05 0.3 2.0 db db db db gain vs. level (transmit and receive)(reference 0 dbv 2 ) ?0 db to +3 db ?.05 0 0.05 db return loss 3 200 hz to 500 hz 500 hz to 3400 hz 20 26 24 29 db db 2-wire idle-channel noise (600 w termination) psophometric c-message 3 khz flat ?7 2 10 ?7 12 20 dbmp dbrnc dbrn transmit idle-channel noise psophometric c-message 3 khz flat ?2 7 15 ?7 12 20 dbmp dbrnc dbrn transhybrid loss 3 200 hz to 500 hz 500 hz to 3400 hz 21 26 24 29 db db
data sheet march 1997 lucent technologies inc. 11 l7554 low-power slic electrical characteristics (continued) table 9. logic inputs and outputs all outputs except rgdet are open-collector with internal pull-up resistor. rgdet is open-collector without inter- nal pull-up. parameter symbol min typ max unit input voltages low level (permissible range) high level (permissible range) v il v ih ?.5 2.0 0.4 2.4 0.7 v cc v v input currents low level (v cc = 5.25 v, v i = 0.4 v) high level (v cc = 5.25 v, v i = 2.4 v) i il i ih ?15 ?0 ?00 ?00 m a m a output voltages (open-collector with internal pull-up resistor) low level (v cc = 4.75 v, i ol = 360 m a) high level (v cc = 4.75 v, i oh = ?0 m a) v ol v oh 0 2.4 0.2 0.4 v cc v v ring trip requirements n ringing signal: ?voltage, minimum 35 vrms, maximum 100 vrms. ?frequency, 17 hz to 23 hz. ?crest factor, 1.4 to 2. n ringing trip: ? 100 ms (typical), 250 ms (v bat = ?3 v, loop length = 530 w ). n pretrip: ?the circuits in figure 3 will not cause ringing trip. 12-2572 (c) figure 3. ring trip circuits ring ring ring 100 w 10 k w 6 ? tip tip tip 2 ? 200 w switch closes < 12 ms
12 lucent technologies inc. data sheet march 1997 l7554 low-power slic test con?urations 12-2570 (c) figure 4. l7554 basic test circuit b1 nlc v bat v bat bgnd v cc agnd v cc 0.1 ? 0.1 ? pt pr i prog dcout lcth rtsp rtsn i cm vtr sn rcvp b0 cf1 20 k w 20 k w v reg xmt rcvn nrdet rgdet 0.1 ? cf2 r loop xmt 65 k w 10 k w rcv 68.1 k w 24.9 k w l7554 slic 26 k w vtx txi fb2 fb1 0.1 ? b2 0.1 ? 100 w 100 w psrr = 20 log 12-2335.a (c) figure 5. metallic psrr psrr = 20 log 12-2336.a (c) figure 6. longitudinal psrr 4.7 ? 100 w v bat or v cc disconnect bypass cap v t/r 900 w v bat or v cc tp pr basic test circuit + v s v s v t/r --------- - v s 4.7 ? 100 w v bat or v cc disconnect bypass cap 56.3 w v bat or v cc pt pr basic test circuit 67.5 w 10 ? 10 ? 67.5 w v m + v s v m ------ -
data sheet march 1997 lucent technologies inc. 13 l7554 low-power slic test con?urations (continued) longitudinal balance = 20 log 12-2584 (c) figure 7. longitudinal balance 12-2586 (c) figure 8. rfi rejection 12-2585 (c) figure 9. longitudinal impedance 12-2587 (c) figure 10. ac gains pt pr basic test circuit 368 w 100 ? 100 ? 368 w v m + v s v s v m ------ - basic test circuit v s = 0.5 vrms 30% am 1 khz modulation, f = 500 khz1 mhz device in powerup mode, 600 w termination pt pr v bat 0.01 ? 0.01 ? 600 w 2.15 ? 82.5 w 82.5 w hp4935a tims 50 w 1 2 4 6,7 v s lb1201 pt pr basic test circuit + + i long i long v pt v pr z long = or d v pt d i long d v pr d i long pt pr basic test circuit 600 w v t/r + g xmt = v xmt v t/r g rcv = v t/r v rcv xmt rcv v s
14 lucent technologies inc. data sheet march 1997 l7554 low-power slic applications 12-2573 (c) figure 11. basic loop start application circuit using t7513 type codec 12-2821 (c) figure 12. ground start application circuit r prog 66.8 k w r lcth 24.9 k w tip r pt 20 w ring 250 v prot r pr l7581 relay pt 30 0.1 ? c cc 14 dcout 3 12 lcth v cc 8 v cc 20 w pr 16 rtsp 32 r ts1 402 w c rts2 0.27 ? rtsn 31 r ts2 274 k w r tsn 2.0 m w v ring v bat cf2 18 cf1 19 c f1 0.47 ? agnd 24 agnd 25 bgnd 27 i prog v bat 15 c bat 0.1 ? vitr rcvp rcvn 20 9 10 r gp 20.0 k w r t1 86.6 k w r t2 18.7 k w r rcv 48.7 k w r hb1 28.0 k w vfxin vfxip r x 28.0 k w gsx pwrop pwron gsr dx dr fsx fsr mc pd clksel a/ t7513 codec control inputs pcm highway synch and clock + l7554 slic b1 b0 36 23 control inputs nlc nrdet 34 33 supervision outputs c rts1 0.022 ? txi v tx cb2 0.1 ? 29 11 b2 35 r tsp 2.0 m w c gp 330 pf c f2 0.1 ? v bat v reg v cc rgdet 100 k w rgdet icm 0.47 ? cicm loop start application circuit 22 21 82.5 k w ricm2
lucent technologies inc. 15 data sheet march 1997 l7554 low-power slic applications (continued) table 10. parts list for loop start and ground start applications name value function integrated circuits slic l7554 subscriber loop interface circuit (slic). protector 250 v thyristor type secondary protection. ringing relay l7581 switches ringing signals. codec t7513 first-generation codec. overvoltage protection r pt 20 w , fusible protection resistor. r pr 20 w , fusible protection resistor. power supply c bat1 0.1 m f, 20%, 100 v v bat ?ter capacitor. c cc 0.1 m f, 20%, 10 v v cc ?ter. c f1 0.47 m f, 20%, 100 v with c f2 , improves idle channel noise. c f2 0.1 m f, 20%, 100 v with c f1 , improves idle channel noise. dc pro?e r prog 66.8 k w , 1%, 1/4 w sets dc loop current limit. ac characteristics c b2 0.1 m f, 20%, 100 v ac/dc separation capacitor. c gb 330 m f, 20%, 10 v loop stability. r t1 86.6 k w , 1%, 1/4 w with r gp and r rcv , sets ac termination impedance. r rcv 48.7 k w , 1%, 1/4 w with r gp and r t1 , sets receive gain. r gp 20.0 k w , 1%, 1/4 w with r t1 and r rcv , sets ac termination impedance and receive gain. c gp 330 pf, 10 v, 20% loop stability. r t2 18.7 k w , 1%, 1/4 w with r x , sets transmit gain in codec. r x 28.0 k w , 1%, 1/4 w with r t2 , sets transmit gain in codec. r hb1 28.0 k w , 1%, 1/4 w sets hybrid balance. supervision r lcth 24.9 k w , 1%, 1/4 w sets loop closure (off-hook) threshold. r ts1 402 w , 5%, 2 w ringing source series resistor. r ts2 274 k w , 5%, 1/4 w with c rts2 , forms ?st pole of a double pole, 2 hz ring trip sense ?ter. c rts1 0.022 m f, 20%, 5 v with r tsn , r tsp , forms second 2 hz ?ter pole. c rts2 0.27 m f, 20%, 100 v with r ts2 , forms ?st 2 hz ?ter pole. r tsn 2 m w , 5%, 1/4 w with c rts1 , r tsp , forms second 2 hz ?ter pole. r tsp 2 m w , 5%, 1/4 w with c rts1 , r tsn , forms second 2 hz ?ter pole. ground start c icm 0.47 m f, 20%, 10 v provides 60 hz ?tering for ring ground detection. r gdet 100 k w , 20%, 1/4 w digital output pull-up resistor. r icm2 82.5 k w , 1%, 1/4 w sets ring ground detection threshold.
16 lucent technologies inc. data sheet march 1997 l7554 low-power slic applications (continued) design considerations table 11 shows the design parameters of the application circuit shown in figure 11. components that are adjusted to program these values are also shown. table 11. 600 w design parameters design parameter parameter value components adjusted loop closure threshold 10 ma r lcth dc loop current limit 40 ma r prog dc feed resistance 183 w r pt , r pr 2-wire signal overload level 3.14 dbm ac termination impedance 600 w r t1 , r gp , r rcv hybrid balance line impedance 600 w r hb1 transmit gain 0 db r t2 , r x receive gain 0 db r rcv , r gp , r t1
data sheet march 1997 lucent technologies inc. 17 l7554 low-power slic applications (continued) characteristic curves 12-2828 (c) figure 13. 7551 receive gain and hybrid balance vs. frequency 12-2829 (c) figure 14. 7551 transmit gain and return loss vs. frequency 12-2830 (c) figure 15. 7551 typical v cc power supply rejection 12-2871 (c) figure 16. 7551 typical v bat power supply rejection frequency (hz) 100 10 5 ?0 ?0 0 10 4 ?0 ?0 ?0 receive gain 1000 hybrid balance (db) 100 1000 10 4 10 5 ?0 ?0 ?0 ?0 0 frequency (hz) ?0 transmit gain return loss (db) 10 100 10 5 10 6 ?0 ?0 ?0 ?0 0 frequency (hz) 1000 10 4 ?0 ?0 ?0 ?0 psrr (db) current limit below current limit spec. 10 100 10 5 10 6 ?0 ?0 ?0 ?0 0 frequency (hz) 1000 10 4 ?0 ?0 ?0 ?0 psrr (db) below current limit specification range current limit
18 lucent technologies inc. data sheet march 1997 l7554 low-power slic applications (continued) characteristic curves (continued) note: v bat = ?8 v. 12-3015 (c) figure 17. loop closure program resistor selection note: tip lead is open; v bat = ?8 v. 12-3016 (c) figure 18. ring ground detection programming note: v bat = ?8 v; i lim = 22 ma; r dc1 = 113 w . 12-3050 (c) figure 19. loop current vs. loop voltage note: v bat = ?8 v; i lim = 22 ma; r dc1 = 113 w . 12-3051 (c) figure 20. loop current vs. loop resistance 0 5 20 25 0 102030 60 loop closure threshold resistor, r lcth (k w ) 50 15 10 40 off-hook threshold loop current (ma) ambient temperature, t a ( c) 20 40 60 140 180 0 500 1000 1500 2000 80 100 120 160 still air 47 c/w 300 cu. ft./ min. 36 c/w power (mw) loop current (ma) 01020 50 0 20 30 40 50 loop voltage (v) 30 40 10 1 10 k w i lim ? r dc1 loop resistance, r loop ( w ) 0 500 1000 2000 0 20 30 40 50 1500 10 loop current (ma)
data sheet march 1997 lucent technologies inc. 19 l7554 low-power slic applications (continued) characteristic curves (continued) note: v bat = ?8 v; i lim = 22 ma; r dc1 = 113 w . 12-3052 (c) figure 21. 7551 typical slic power dissipation vs. loop resistance 12-2825 (c) figure 22. power derating 12-3019 (c) figure 23. longitudinal balance resistor mismatch requirements 12-3021 (c) figure 24. longitudinal balance vs. protection resistor mismatch loop resistance, r loop ( w ) 0 500 1000 2000 0 1000 1500 1500 500 slic power dissipation (mw) ambient temperature, t a ( c) 20 40 60 140 180 0 500 1000 1500 2000 80 100 120 160 still air 47 c/w 300 cu. ft./ min. 36 c/w power (mw) 0 8 0 20 60 100 120 protection resistor value ( w ) 7 6 5 4 3 2 1 40 80 49 db, rp matched to 1.5 w 58 db, rp matched to 0.5 w protection resistor mismatch (%) 40 60 0.0 0.5 1.5 2.5 protection resistor mismatch ( w ) 55 50 45 1.0 2.0 longitudinal balance (db)
20 20 lucent technologies inc. data sheet march 1997 l7554 low-power slic applications (continued) dc applications battery feed the dc feed characteristic can be described by: where: i l = dc loop current. v t/r = dc loop voltage. |v bat | = battery voltage magnitude. v oh = overhead voltage. this is the difference between the battery voltage and the open loop tip/ring voltage. r l = loop resistance, not including protection resistors. r p = protection resistor value. rdc = slic internal dc feed resistance. the design begins by drawing the desired dc template. an example is shown in figure 25. note: v bat = ?8 v; i lim = 22 ma; r dc1 = 113 w . 12-3050 (c) figure 25. loop current vs. loop voltage starting from the on-hook condition and going through to a short circuit, the curve passes through two regions: region 1; on-hook and low loop currents. the slope corresponds to the dc resistance of the slic, r dc1 (de- fault is 113 w typical). the open-circuit voltage is the battery voltage less the overhead voltage of the device, v oh (default is 6.5 v typical). these values are suitable for most applications, but can be adjusted if needed. for more information, see the sections entitled adjusting dc feed resistance and adjusting overhead voltage. region 2; current limit. the dc current is limited to a val- ue determined by external resistor r prog . this region of the dc template has a high resistance (10 k w ). calculate the external resistor as follows: r prog (k w ) = 1.67 i lim (ma) overhead voltage in order to drive an on-hook ac signal, the slic must set up the tip and ring voltage to a value less than the battery voltage. the amount that the open loop voltage is decreased relative to the battery is referred to as the overhead voltage. expressed as an equation, v oh = |v bat | ?(v pt ?v pr ) without this buffer voltage, ampli?r saturation will occur and the signal will be clipped. the 7551 is auto- matically set at the factory to allow undistorted on-hook transmission of a 3.17 dbm signal into a 900 w loop impedance. for applications where higher signal levels are needed, e.g., periodic pulse metering, the 2-wire port of the slic can be programmed with pin dcr. the drive ampli?rs are capable of 4 vrms minimum (v amp ). referring to figure 26, the internal resistance has a worst-case value of 46 w . so, the maximum sig- nal the device can guarantee is: thus, r p 35 w allows 2.2 vrms metering signals. the next step is to determine the amount of overhead volt- age needed. the peak voltage at output of tip and ring ampli?rs is related to the peak signal voltage by: v tr v bat v oh () r l r l 2r p rdc ++ -------------------------------------------- = i l v bat v oh r l 2r p rdc ++ ----------------------------------- = loop current (ma) 01020 50 0 20 30 40 50 loop voltage (v) 30 40 10 1 10 k w i lim ? r dc1 v t/r 4 v z t/r z t/r 2r p 46 + () + ----------------------------------------- ? ?? = vamp = v t/r 1 2r p 40 w + () z tr ------------------------------ + ? ?? l l
lucent technologies inc. 21 data sheet march 1997 l7554 low-power slic applications (continued) dc applications (continued) 12-2563 (c) figure 26. slic 2-wire output stage in addition to the required peak signal level, the slic needs about 2 v from each power supply to bias the ampli?r circuitry. it can be thought of as an internal saturation voltage. combining the saturation voltage and the peak signal level, the required overhead can be expressed as: where v sat is the combined internal saturation voltage between the tip/ring ampli?rs and v sat (4.0 v typ.). r p ( w ) is the protection resistor value, and 40 w is the output series resistance of each internal ampli?r. z t/r ( w ) is the ac loop impedance. example 1, on-hook transmission of a meter pulse: signal level: 2.2 vrms into 200 w 35 w protection resistors i loop = 0 (on-hook transmission of the metering signal) accounting for v sat tolerance of 0.5 v, a nominal overhead of 9.9 v would ensure transmission of an undistorted 2.2 v metering signal. adjusting overhead voltage to adjust the open loop 2-wire voltage, pin dcr is programmed at the midpoint of a resistive divider from ground to either ? v or v bat . in the case of ? v, the overhead voltage will be independent of the battery voltage. figure 27 shows the equivalent input circuit to adjust the overhead. 12-2562 (c) figure 27. equivalent circuit for adjusting the overhead voltage the overhead voltage is programmed by using the fol- lowing equation: v oh = 6.5 ?4 v dcr v t/r [z t/r ]v amp + r oc /2 r p r p + r oc /2 v oh v sat 1 2r p 40 w + () z tr ------------------------------ + ? ?? v tr + = l v sat 1 2r p 40 w + () z tr ------------------------------ + ? ?? 2z tr 1000 ---------------- 10 dbm 20 + = v oh 4.0 1 235 40 + () 200 --------------------------- - + ? ?? 2 2.2 () + = 9.4 v = dcr 25 k w 30% r1 r2 ? v 6.5 4 5 r 1 25 k w || r 2 r 1 25 k w || + ------------------------------------- - ? ?? ? ?? = 6.5 20 r 1 25 k w || r 2 r 1 25 k w || + ------------------------------------- - ? ?? + =
22 22 lucent technologies inc. data sheet march 1997 l7554 low-power slic applications (continued) dc applications (continued) adjusting dc feed resistance the dc feed resistance may be adjusted with the help of figure 28. 12-2560 (c) figure 28. equivalent circuit for adjusting the dc feed resistance adjusting overhead voltage and dc feed resistance simultaneously the following paragraphs describe the independent set- ting of the overhead voltage and the dc feed resistance. if both need to be set to customized values, combine the two circuits as shown in figure 29. 12-2561 (c) figure 29. adjusting both overhead voltage and dc feed resistance this is an equivalent circuit for adjusting both the dc feed resistance and overhead voltage together. the adjustments can be made by the simple superposi- tion of the overhead and dc feed equations: when selecting external components, select r1 on the order of 5 k w to minimize the programming inaccuracy caused by the internal 25 k w resistor. lower values can be used; the only disadvantage is the power consump- tion of the external resistors. loop range the equation below can be rearranged to provide the loop range for a required loop current: off-hook detection the loop closure comparator has built-in longitudinal rejection, eliminating the need for an external 60 hz ?- ter. this applies in both powerup and low-power scan states. the loop-closure detection threshold is set by resistor r lcth . referring to figure 30, nlc is high in an on-hook condition (i tr = 0, v dcout = 0), and v lcth = 0.05 ma x r lcth . the off-hook comparator goes low when v lcth crosses zero and then goes neg- ative: v lcth = 0.05 ma x r lcth + v dcout = 0.05 x r lcth ?0.125 v/ma x i tr r lcth (k w ) = 2.5 x i tr (ma) 12-2553.a (c) figure 30. off-hook detection circuit dcr 25 k w 30% r1 r3 dcout rdc 113 w 500 w d v dcr d v dcout -------------------- + = 113 w 500 w r 1 25 k w || r 3 r 1 25 k w || + --------------------------------- - ? ?? + = dcr 25 k w 30% r1 r3 dcout r2 ? v v oh 6.5 20 r 1 25 k w r 3 || || r 2 r 1 25 k w r 3 || || + --------------------------------------------- - ? ?? + = rdc 113 w 500 w r 1 25 k w || r 3 r 1 25 k w || + ----------------------------------- ? ?? + = r l v bat v oh i l ---------------------------- 2r p rdc = r l itr r p r p pr + + dcout r lcth lcth nlc pt ?.125 v/ma 0.05 ma
lucent technologies inc. 23 data sheet march 1997 l7554 low-power slic applications (continued) dc applications (continued) ring trip detection the ring trip circuit is a comparator that has a special in- put section optimized for this application. the equiva- lent circuit is shown in figure 31, along with its use in an application using unbalanced, battery-backed ringing. 12-3014 (c) figure 31. ring trip equivalent circuit and equivalent application the comparator input voltage compliance is v cc to v bat , and the maximum current is 240 m a in either direction. its application is straightforward. a resistance (r tsn + r ts2 ) in series with the r tsn input establishes a current that is repeated in the r tsp input. a slightly lower resistance (r tsp ) is placed in series with the r tsp input. when ringing is being injected, no dc current ?ws through r ts1 , so the r tsp input is at a lower potential than r tsn . when enough dc loop current ?ws, the r tsp input voltage increases to trip the com- parator. in figure 31, a low-pass ?ter with a double pole at 2 hz was implemented to prevent false ring trip. the following example illustrates how the detection cir- cuit of figure 31 will trip at 12.5 ma dc loop current us- ing a ?8 v battery. the current i n is repeated as i p in the positive compar- ator input. the voltage at comparator input r tsp is: using this equation and the values in the example, the voltage at input r tsp is ?2 v during ringing injection (i loop(dc) = 0). input r tsp is, therefore, at a level of 5 v below r tsn . when enough dc loop current flows through r ts1 to raise its dc drop to 5 v, the comparator will trip. in this example, ring ground detection pin icm sinks a current proportional to the longitudinal loop current. it is also connected to an internal compar- ator whose output is pin rgdet. in a ground start application where tip is open, the ring ground current is half differential and half common mode. in this case, to set the ring ground current threshold, connect a resistor r icm from pin icm to v cc . select the resistor according to the following relation: the above equation is shown graphically in figure 18. it applies for the case of tip open. the more general equation can be used in ground key application to detect a common-mode current i cm : + r tsp r loop + 15 k w 7 v i p = i n r tsn r ts2 2 m w 2 m w c rts1 0.022 ? c rts2 0.27 ? 274 k w phone hook switch rc phone v ring v bat nrdet r ts1 402 w r tsp i n r tsn i n ? ?(?8) 2.289 k w -------------------------- - = 17.9 m a = v rtsp v bat i loop dc () + r ts1 i p r tsp + = i loop dc () 5 v 402 w ---------------- - = 12.5 ma = r icm k w () v cc 120 i rg ma () ---------------------- = r icm k w () v cc 60 i cm ma () ------------------- =
24 24 lucent technologies inc. data sheet march 1997 l7554 low-power slic applications (continued) ac design there are four key ac design parameters. termination impedance is the impedance looking into the 2-wire port of the line card. it is set to match the impedance of the telephone loop in order to minimize echo return to the telephone set. transmit gain is measured from the 2-wire port to the pcm highway, while receive gain is done from the pcm highway to the transmit port. finally, the hybrid balance network cancels the unwanted amount of the receive signal that appears at the transmit port. at this point in the design, the codec needs to be select- ed. the discrete network between the slic and the codec can then be designed. the following is a brief codec feature and selection summary. first-generation codecs these perform the basic filtering, a/d (transmit), d/a (receive), and m -law/a-law companding. they all have an op amp in front of the a/d converter for transmit gain setting and hybrid balance (cancellation at the summing node). depending on the type, some have differential analog input stages, differential analog output stages, and m -law/a-law selectability. this generation of codecs have the lowest cost. they are most suitable for appli- cations with fixed gains, termination impedance, and hybrid balance. second-generation codecs this class of devices includes a microprocessor inter- face for software control of the gains and hybrid bal- ance. the hybrid balance is included in the device. ac programmability adds application flexibility and saves several passive components and also adds several i/o latches that are needed in the application. however, there is no transmit op amp, since the transmit gain and hybrid balance are set internally. third-generation codecs this class of devices includes the gains, termination impedance, and hybrid balance?ll under micropro- cessor control. depending on the device, it may or may not include latches. selection criteria in the codec selection, increasing software control and flexibility are traded for device cost. to help decide, it may be useful to consider the following. will the appli- cation require only one value for each gain and imped- ance? will the board be used in different countries with different requirements? will several versions of the board be built? if so, will one version of the board be most of the production volume? does the application need only real termination impedance? does the hybrid balance need to be adjusted in the field? in the following examples, use of a first-generation co- dec is shown. the equations for second- and third-gen- eration codecs are simply subsets of these. there are two examples: the first shows the simplest circuit, which uses a minimum number of discrete components to synthesize a real termination impedance. the second example shows the use of the uncommitted op amp to synthesize a complex termination. the design has been automated in a dos-based program, available on re- quest.
lucent technologies inc. 25 data sheet march 1997 l7554 low-power slic applications (continued) ac design (continued) ac equivalent circuits using a t7513 codec are shown in figures 32 and 33. 12-2554.a (c) figure 32. ac equivalent circuit not including spare op amp 12-3013 (c) figure 33. ac equivalent circuit including spare op amp + + + r p pr 40 w z t + r p pt 40 w v t/r i t/r a v = ? a v = 1 ?.4 v/ma r t1 r rcv r hb1 r t2 vitr rcvn rcvp r x vgsx vfxin vfxip vfr (pwrop) t7513 codec att7564 slic v s z t/r a v = 4 r g l7554 slic + r gn + r t3 r rcv r hb1 r x vgsx vfxin vfxip vfr (pwrop) t7513 codec + r p pr 40 w z t + r p pt 40 w v t/r i t/r a v = ? a v = 1 ?.4 v/ma vitr rcvn rcvp v s z t/r a v = 4 + z t5 r t6 xmt sn r t4 agnd l7554 slic
26 26 lucent technologies inc. data sheet march 1997 l7554 low-power slic r hb r x gtx g rcv -------------------- = applications (continued) ac design (continued) example 1, real termination the following design equations refer to the circuit in figure 32. use these to synthesize real termination impedance. termination impedance: receive gain: transmit gain: hybrid balance: hbal = 20log to optimize the hybrid balance, the sum of the currents at the vfx input of the codec op amp should be set to 0. the following expressions assume that the test net- work is the same as the termination impedance. example 2, complex termination: for complex termination, the spare op amp is used (see figure 33). the hybrid balance equation is the same as in example 1. pcb layout information make the leads to bgnd and v bat as wide as possible for thermal and electrical reasons. also, maximize the amount of pcb copper in the area of?nd speci?ally on?he leads connected to this device for the lowest operating temperature. when powering the device, ensure that no external potential creates a voltage on any pin of the device that exceeds the device ratings. in this application, some of the conditions that cause such potentials during pow- erup are the following: 1) an inductor connected to pt and pr (this can force an overvoltage on v bat through the protection devices if the v bat connection chatters) and 2) inductance in the v bat lead (this could resonate with the v bat ?ter capacitor to cause a destructive overvoltage). this device is normally used on a circuit card that is subjected to hot plug-in, meaning the card is plugged into a biased backplane connector. in order to prevent damage to the ic, all ground connections must be applied before, and removed after, all other connec- tions. z t v tr i tr ---------- = z t 2r p 80 w 3200 1 r t1 r gp -------- - r t1 r rcv ----------- - ++ ----------------------------------- ++ = g rcv v tr v fr ---------- = g rcv 8 1 r rcv r t1 ----------- r rcv r gp ----------- - ++ ? ?? 1 z t z tr ---------- + ? ?? ------------------------------------------------------------------ - = g tx v gsx v tr ---------- = g tx r x r t2 ------- - 400 z tr ---------- = v gsx vfr ------------ ? ?? h bal 20 r x r hb -------- - gtx g rcv ? ?? log = z t 2r p 80 w 3200 1 r t3 r gn --------- r t3 r rcv ----------- - ++ ----------------------------------- z t5 r t4 --------- () ++ = 2r p 80 w kz t5 () ++ = grcv 8 1 r rcv r t3 ------------- - r rcv r gn ------------- - ++ ? ?? 1 z t z t/r ---------- + ? ?? --------------------------------------------------------------------------- - = gtx r x r t 6 ---------- - 400 z t/r ---------- z t5 r t4 --------- =
lucent technologies inc. 27 data sheet march 1997 l7554 low-power slic outline diagram 44-pin plcc controlling dimensions are in millimeters. 5-2506r7 (c) 4.57 max 1.27 typ 0.53 max 0.10 seating plane 0.51 min typ 1 640 7 17 29 39 18 28 pin #1 identifier zone 16.66 max 17.65 max 16.66 max 17.65 max
data sheet march 1997 l7554 low-power slic for additional information, contact your microelectronics group account manager or the following: internet: http://www.lucent.com/micro u.s.a.: microelectronics group, lucent technologies inc., 555 union boulevard, room 30l-15p-ba, allentown, pa 18103 1-800-372-2447 , fax 610-712-4106 (in canada: 1-800-553-2448 , fax 610-712-4106), e-mail docmaster@micro.lucent.com asia pacific: microelectronics group, lucent technologies singapore pte. ltd., 77 science park drive, #03-18 cintech iii, singapore 118256 tel. (65) 778 8833 , fax (65) 777 7495 japan: microelectronics group, lucent technologies japan ltd., 7-18, higashi-gotanda 2-chome, shinagawa-ku, tokyo 141, japan tel. (81) 3 5421 1600 , fax (81) 3 5421 1700 for data requests in europe: microelectronics group dataline: tel. (44) 1734 324 299 , fax (44) 1734 328 148 for technical inquiries in europe: central europe: (49) 89 95086 0 (munich), northern europe: (44) 1344 865 900 (bracknell uk), france: (33) 1 41 45 77 00 (paris), southern europe: (39) 2 6601 1800 (milan) or (34) 1 807 1700 (madrid) lucent technologies inc. reserves the right to make changes to the product(s) or information contained herein without notice. no liability is assumed as a result of their use or application. no rights under any patent accompany the sale of any such product(s) or information. copyright ?1997 lucent technologies inc. all rights reserved printed in u.s.a. march 1997 ds97-202alc (replaces ds96-229lcas) printed on recycled paper ordering information *devices on tape and reel must be ordered in 1000-piece increments. device part no. description package comcode attl7554ap low-power slic, ?0 v 44-pin plcc 107080921 attl7554ap?r* low-power slic, ?0 v 44-pin plcc (tape and reel) 107177172 attl7554bp low-power slic, ?2 v 44-pin plcc 107548927 attl7554bp?r* low-power slic, ?2 v 44-pin plcc (tape and reel) 107548943

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